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T89C5115单片机技术分析

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T89C5115芯片主要特点:
·80C51 Core Architecture
·256 Bytes of On-chip RAM
·256 Bytes of On-chip ERAM
– 16-KB of On-chip Flash Memory
– Data Retention: 10 Years at 85°C
– Read/Write Cycle: 10K
·2K Bytes of On-chip Flash for Bootloader
·2K Bytes of On-chip EEPROM
– Read/Write Cycle: 100k
·14-sources 4-level Interrupts
·Three 16-bit Timers/Counters
·Full Duplex UART Compatible 80C51
·Maximum Crystal Frequency 40 MHz
– InX2Mode,20MHz(CPUcore,40MHz)
·Three or Four Ports: 16 or 20 Digital I/O Lines
·Two-channel 16-bit PCA with:
– PWM (8-bit)
– High-speed Output
– Timer and Edge Capture
·Double Data Pointer
·21-bit WatchDog Timer (7 Programmable Bits)
·A 10-bit Resolution Analog to Digital Converter (ADC) with 8 Multiplexed Inputs
·Power Saving Modes:
– Idle Mode
– Power-down Mode
·Power Supply: 5V ± 10% (or 3V(1)± 10%)
·Temperature Range: Industrial (-40° to +85°C)
·Packages: SOIC28, PLCC28, VQFP32